feat(course): bo prototype
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circuit/25-1/dz/24.11.pdf
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circuit/25-1/dz/24.11.pdf
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circuit/25-2/course_project/img/bo-cs1.png
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circuit/25-2/course_project/img/bo-cs3.png
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circuit/25-2/course_project/img/bo-ra.png
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circuit/25-2/course_project/img/bo-rb.png
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circuit/25-2/course_project/img/bo-rpr.png
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circuit/25-2/course_project/img/bo-rr.png
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circuit/25-2/course_project/img/bo-scheme.png
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@ -148,7 +148,7 @@ $$[A]_{\text{п}} = a_3, a_2 a_1 a_0$$
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$b_0 = 1$ & & 0 & 1 & 1 & 1 & & & & \makecell[l]{RA} \\ \hline
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& 0 & 0 & 1 & 1 & 1 & 0 & 0 & 0 & \makecell[l]{RR} \\
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& 0 & 0 & 0 & 1 & 1 & 1 & 0 & 0 & \makecell[l]{RR >> 1} \\
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$b_1 = 0$ & \multicolumn{8}{c}{\text{пропуск такта суммирования}} & \\ \hline
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$b_1 = 0$ & \multicolumn{9}{l}{\text{пропуск такта суммирования}} \\ \hline
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& 0 & 0 & 0 & 1 & 1 & 1 & 0 & 0 & \makecell[l]{RR} \\
|
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& 0 & 0 & 0 & 0 & 1 & 1 & 1 & 0 & \makecell[l]{RR >> 1} \\
|
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$b_2 = 1$ & & 0 & 1 & 1 & 1 & & & & \makecell[l]{RA} \\ \hline
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@ -222,8 +222,12 @@ $$[A]_{\text{п}} = a_3, a_2 a_1 a_0$$
|
||||
Обознач & Назначение УМНОЖЕНИЕ & ПРОВЕРКА БИТА \\ \hline
|
||||
RA & Регистр 1-го операнда, 4 разряда, множимое, параллельная загрузка, хранение & позиция бита, параллельная загрузка \\ \hline
|
||||
RB & Регистр 2-го операнда, 4 разряда, множитель, параллельная загрузка, хранение & регистр данных, параллельная загрузка \\ \hline
|
||||
RR & Регистр результата, 8 разрядов, параллельная загрузка, хранение, сдвиг вправо на 1 разряд & новое значение регистра RB, 4 разряда, параллельная загрузка, хранение \\ \hline
|
||||
RR & Регистр результата, 8 разрядов, параллельная загрузка, хранение, сдвиг вправо на 1 разряд & новое значение регистра RB, 4 старших разряда, параллельная загрузка, хранение \\ \hline
|
||||
RPR & & Регистр флага CF, 1 разряд, параллельная загрузка, хранение \\ \hline
|
||||
КС1 & Выбор множимого: RB или RR[6:3]. Формирование сигнала F0 для МУУ & \\ \hline
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||||
КС2 & Формирование знака для КС3 & Новое значение RB с установленным битом для КС3. Формирование RPR \\ \hline
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||||
КС3 & Загрузка результата суммирования в RR[6:3] или знака в RR[7] & Загрузка нового значения RB с установленным битом в RR[6:3] \\ \hline
|
||||
SM & 4-разрядный сумматор. Пропуск такта & \\ \hline
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||||
& &
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||||
\end{tabular}
|
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\caption{Элементы функциональной схемы}
|
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@ -231,4 +235,186 @@ $$[A]_{\text{п}} = a_3, a_2 a_1 a_0$$
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\end{minipage}
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\end{figure}
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||||
|
||||
\newpage
|
||||
\subsection{Проектирование логических элементов блока операций}
|
||||
\subsubsection{Регистр первого операнда RA}
|
||||
|
||||
Данный регистр является четырёхразрядным регистром хранения. Наиболее подходящим для реализации функций регистра RA является регистр FD4CE
|
||||
|
||||
\begin{minipage}{0.3\textwidth}
|
||||
\centering
|
||||
Таблица управляющих сигналов RA
|
||||
\begin{tabular}{|c|c|}
|
||||
\hline
|
||||
Y0 & Назначение \\ \hline
|
||||
0 & Хранение \\ \hline
|
||||
1 & Загрузка \\ \hline
|
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\end{tabular}
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\end{minipage}
|
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\begin{minipage}{0.69\textwidth}
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\begin{figure}[H]
|
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\centering
|
||||
\includegraphics[width=0.3\textwidth]{bo-ra}
|
||||
\caption{Логическая схема RA}
|
||||
\label{bo-ra}
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\end{figure}
|
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\end{minipage}
|
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|
||||
\subsubsection{Регистр второго операнда RB}
|
||||
|
||||
Данный регистр является четырёхразрядным регистром хранения. Наиболее подходящим для реализации функций регистра RB является регистр FD4CE
|
||||
|
||||
\begin{minipage}{0.3\textwidth}
|
||||
\centering
|
||||
Таблица управляющих сигналов RB
|
||||
\begin{tabular}{|c|c|}
|
||||
\hline
|
||||
Y0 & Назначение \\ \hline
|
||||
0 & Хранение \\ \hline
|
||||
1 & Загрузка \\ \hline
|
||||
\end{tabular}
|
||||
\end{minipage}
|
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\begin{minipage}{0.69\textwidth}
|
||||
\begin{figure}[H]
|
||||
\centering
|
||||
\includegraphics[width=0.3\textwidth]{bo-rb}
|
||||
\caption{Логическая схема RB}
|
||||
\label{bo-rb}
|
||||
\end{figure}
|
||||
\end{minipage}
|
||||
|
||||
\subsubsection{Регистр результата RR}
|
||||
|
||||
Данный регистр является 8-разрядным регистром с логическим сдвигом вправо на 1 разряд, хранением, параллельной загрузкой. Наиболее подходящим для реализации функции регистра RR является регистр SR8CLE
|
||||
|
||||
\begin{minipage}{0.3\textwidth}
|
||||
\centering
|
||||
Таблица управляющих сигналов RR
|
||||
\begin{tabular}{|c|c|c|}
|
||||
\hline
|
||||
Y5 & Y4 & Назначение \\ \hline
|
||||
0 & 0 & Хранение \\ \hline
|
||||
0 & 1 & Загрузка \\ \hline
|
||||
1 & 0 & SHR \\ \hline
|
||||
\end{tabular}
|
||||
\end{minipage}
|
||||
\begin{minipage}{0.69\textwidth}
|
||||
\begin{figure}[H]
|
||||
\centering
|
||||
\includegraphics[width=0.8\textwidth]{bo-rr}
|
||||
\caption{Логическая схема RR}
|
||||
\label{bo-rr}
|
||||
\end{figure}
|
||||
\end{minipage}
|
||||
|
||||
\subsubsection{Регистр признака RPR}
|
||||
|
||||
Данный регистр является 1-разрядным с хранением и загрузкой. Наиболее подходящим для реализации функции регистра RPR является
|
||||
|
||||
\begin{minipage}{0.3\textwidth}
|
||||
\centering
|
||||
Таблица управляющих сигналов RPR
|
||||
\begin{tabular}{|c|c|}
|
||||
\hline
|
||||
Y7 & Назначение \\ \hline
|
||||
0 & Хранение \\ \hline
|
||||
1 & Загрузка \\ \hline
|
||||
\end{tabular}
|
||||
\end{minipage}
|
||||
\begin{minipage}{0.69\textwidth}
|
||||
\begin{figure}[H]
|
||||
\centering
|
||||
\includegraphics[width=0.3\textwidth]{bo-rpr}
|
||||
\caption{Логическая схема RPR}
|
||||
\label{bo-rpr}
|
||||
\end{figure}
|
||||
\end{minipage}
|
||||
|
||||
\subsubsection{Комбинационная схема КC1}
|
||||
|
||||
С помощью комбинационной схемы КС1 осуществляется выбор множимого из RB или RR[6:3], а также формируется сигнал F0 для МУУ
|
||||
|
||||
\begin{minipage}{0.3\textwidth}
|
||||
\centering
|
||||
Таблица управляющих сигналов КС1
|
||||
\begin{tabular}{|c|c|}
|
||||
\hline
|
||||
Y6 & Назначение \\ \hline
|
||||
0 & Выбор RB \\ \hline
|
||||
1 & Выбор RR[6:3] \\ \hline
|
||||
\end{tabular}
|
||||
\end{minipage}
|
||||
\begin{minipage}{0.69\textwidth}
|
||||
\begin{figure}[H]
|
||||
\centering
|
||||
\includegraphics[width=0.8\textwidth]{bo-cs1}
|
||||
\caption{Логическая схема КС1}
|
||||
\label{bo-cs1}
|
||||
\end{figure}
|
||||
\end{minipage}
|
||||
|
||||
\newpage
|
||||
\subsubsection{Комбинационная схема КC2}
|
||||
|
||||
С помощью комбинационной схемы КС2 осуществляется формирование знака для операции умножени, формирование нового значения RB с установленным битом и формирование флага CF для операции установки бита
|
||||
|
||||
\begin{figure}[H]
|
||||
\centering
|
||||
\includegraphics[width=0.6\textwidth]{bo-cs2}
|
||||
\caption{Логическая схема КС2}
|
||||
\label{bo-cs2}
|
||||
\end{figure}
|
||||
|
||||
\newpage
|
||||
\subsubsection{Комбинационная схема КC3}
|
||||
|
||||
С помощью комбинационной схемы КС3 осуществляется загрузка промежуточной суммы в RR[6:3] и знака в RR[7] в операции умножения, нового значения RB с установленными битами в RR[6:3] в операции установки бита
|
||||
|
||||
\begin{minipage}{0.3\textwidth}
|
||||
\centering
|
||||
Таблица управляющих сигналов КС3
|
||||
\begin{tabular}{|c|c|c|}
|
||||
\hline
|
||||
Y3 & Y2 & Назначение \\ \hline
|
||||
0 & 0 & сумма в RR[6:3] \\ \hline
|
||||
0 & 1 & знак RR[7] \\ \hline
|
||||
1 & 0 & значение RB в RR[6:3] \\ \hline
|
||||
\end{tabular}
|
||||
\end{minipage}
|
||||
\begin{minipage}{0.69\textwidth}
|
||||
\begin{figure}[H]
|
||||
\centering
|
||||
\includegraphics[width=0.8\textwidth]{bo-cs3}
|
||||
\caption{Логическая схема КС3}
|
||||
\label{bo-cs3}
|
||||
\end{figure}
|
||||
\end{minipage}
|
||||
|
||||
\newpage
|
||||
\subsubsection{Сумматор SM}
|
||||
|
||||
4-разрядный, старшие разряды множимого и множителя, carry input установлены в 0
|
||||
|
||||
\begin{minipage}{\textwidth}
|
||||
\begin{figure}[H]
|
||||
\centering
|
||||
\includegraphics[width=0.6\textwidth]{bo-sm}
|
||||
\caption{Логическая схема SM}
|
||||
\label{bo-sm}
|
||||
\end{figure}
|
||||
\end{minipage}
|
||||
|
||||
\newpage
|
||||
\subsection{Логическая схема блока операций}
|
||||
|
||||
\begin{minipage}{\textwidth}
|
||||
\begin{figure}[H]
|
||||
\centering
|
||||
\includegraphics[width=\textwidth]{bo-scheme}
|
||||
\caption{Логическая схема БО}
|
||||
\label{bo-scheme}
|
||||
\end{figure}
|
||||
\end{minipage}
|
||||
|
||||
|
||||
\end{document}
|
||||
|
||||
Reference in New Issue
Block a user